![]() 選擇性抑制含有矽及氮兩者之材料的乾蝕刻率之方法
专利摘要:
茲描述一種在圖案化異質結構上抑制對暴露的含矽與氮材料之蝕刻速率的方法,且該方法包括兩階段遠端電漿蝕刻。相對於氮化矽及含矽與氮的其他物質,使用本方法可增加矽的蝕刻選擇性。遠端電漿蝕刻的第一階段將電漿流出物與圖案化異質結構反應,以在含矽與氮材料上形成保護性固態副產物。第一階段的電漿流出物由前驅物之組合(包括三氟化氮及氫氣(H2))的遠端電漿形成。遠端電漿蝕刻的第二階段亦將電漿流出物與圖案化異質結構反應,以選擇性地移除缺乏保護性固態副產物的材料。第二階段的電漿流出物由含氟前驅物的遠端電漿形成。 公开号:TW201320186A 申请号:TW101131796 申请日:2012-08-31 公开日:2013-05-16 发明作者:Yun-Yu Wang;An-Chuan Wang;jing-chun Zhang;Nitin K Ingle;Young S Lee 申请人:Applied Materials Inc; IPC主号:H01L21-00
专利说明:
選擇性抑制含有矽及氮兩者之材料的乾蝕刻率之方法【相關申請案之交互參照】 此申請案主張美國臨時申請案61/530,302之權益,該申請案於2011年9月1日提出,發明名稱為「SELECTIVE SUPPRESSION OF DRY-ETCH RATE OF MATERIALS CONTAINING BOTH SILICON AND NITROGEN」,該申請案以全文形式在此併入,以供所有目的之用。 本發明是關於半導體處理技術。 藉由在基板表面上產生錯綜複雜圖案化的材料層之製程,可製做積體電路。在基板上產生圖案化材料需要受控的方法以移除暴露的材料。化學蝕刻被用於各種目的,包括將光阻中的圖案轉移進入下方層中、薄化層或薄化已經存在於表面上的特徵結構之側向尺寸。通常,期望具有蝕刻一種材料比另一種快的蝕刻製程,以助於例如圖案轉移製程進行。此類蝕刻製程可說是對第一材料有選擇性。材料、電路與製程多樣化的結果是,蝕刻製程已被開發成具有對多種材料的選擇性。然而,僅有少數選項能選擇地以比蝕刻氮化矽更快的速度來蝕刻矽。 就選擇地移除半導體基板上的材料而言,通常期望使用乾式蝕刻製程。乾式蝕刻製程受到期望的原因是源自於在最小化物理干擾的情況下,從微型結構溫和地移除材料的能力。藉由移除氣相試劑,乾式蝕刻製程也容許蝕刻速率突然停止。某些乾式蝕刻製程會使基板暴露於遠端電漿副產物,該遠端電漿副產物在進入基板處理區域之前已經被離子過濾。具有暴露的矽及氮化矽之圖案化基板可藉由自三氟化氮所形成的經離子過濾的電漿流出物來蝕刻。以此方式,暴露的矽顯示出比氮化矽更迅速地被蝕刻。 因此,需要就使用乾式蝕刻製程相對於氮化矽及含矽與氮的其他物質來改良矽的蝕刻選擇性的方法。 茲描述一種在圖案化異質結構上抑制對暴露的含矽與氮材料之蝕刻速率的方法,且該方法包括兩階段遠端電漿蝕刻。相對於氮化矽及含矽與氮的其他物質,使用本方法可增加矽的蝕刻選擇性。遠端電漿蝕刻的第一階段將電漿流出物與圖案化異質結構反應,以在含矽與氮材料上形成保護性固態副產物。第一階段的電漿流出物由前驅物之組合(包括三氟化氮及氫氣(H2))的遠端電漿形成。遠端電漿蝕刻的第二階段亦將電漿流出物與圖案化異質結構反應,以選擇性地移除缺乏保護性固態副產物的材料。第二階段的電漿流出物由含氟前驅物的遠端電漿形成。 本發明的實施例包括一種在基板處理腔室的基板處理區域中蝕刻圖案化基板的方法。圖案化基板具有暴露的含矽與氮區域及矽的暴露的區域。蝕刻圖案化基板的方法包含以下步驟序列:(1)第一乾式蝕刻階段,包含以下步驟:將三氧化氮及氫分子流入遠端電漿區域,遠端電漿區域流體耦合至基板處理區域,同時在遠端電漿區域中形成第一電漿,以產生第一電漿流出物,及在暴露的含矽與氮區域上形成保護性固態副產物,以形成受保護的含矽與氮區域;(2)第二乾式蝕刻階段,包含以下步驟:將第二含氟前驅物流入遠端電漿區域,同時在遠端電漿區域中形成第二電漿,以產生第二電漿流出物,及藉由將第二電漿流出物通過噴頭中的通孔,流入基板處理區域,而相較於受保護的含矽與氮區域,更快速地蝕刻矽的暴露的區域;及(3)藉由提昇圖案化基板的溫度,自受保護的含矽與氮區域昇華保護性固態副產物。 部分額外實施例與特徵在隨後的說明書中提出,而對於此技術領域中具有通常知識者而言在詳閱此說明書後可易於瞭解部分額外實施例與特徵,或者此技術領域中熟習技藝者可透過操作本文揭露的實施例而瞭解部分額外實施例與特徵。透過在說明書中描述的設備、結合物與方法,可實現與獲得本文揭露的實施例之特徵與優點。 茲描述一種在圖案化異質結構上抑制對暴露的含矽與氮材料之蝕刻速率的方法,且該方法包括兩階段遠端電漿蝕刻。相對於氮化矽及含矽與氮的其他物質,使用本方法可增加矽的蝕刻選擇性。遠端電漿蝕刻的第一階段將電漿流出物與圖案化異質結構反應,以在含矽與氮材料上形成保護性固態副產物。第一階段的電漿流出物由前驅物之組合(包括三氧化氮及氫氣(H2))的遠端電漿形成。遠端電漿蝕刻的第二階段亦將電漿流出物與圖案化異質結構反應,以選擇性地移除缺乏保護性固態副產物的材料。第二階段的電漿流出物由含氟前驅物的遠端電漿形成。 為了較佳地瞭解與認識本發明,現在請參考第1圖,第1圖為根據本文揭露的實施例之矽選擇性蝕刻製程的流程圖。使用本文所呈現的方法可增加矽蝕刻選擇性。在第一個操作之前,於經圖案化基板中形成一結構。該結構擁有個別的氮化矽及矽的暴露區域。接著傳遞基板進入處理區域(操作110)。氫氣(H2)及三氟化氮之流體開始進入與基板處理腔室分開的電漿區域中(操作113)。分離的電漿區域可指本文的遠端電漿區域,且可能為與處理腔室有所區別的模組,或為處理腔室內的隔間。遠端電漿流出物(即,來自遠端電漿的產物)流入處理區域中,且允許與基板表面互動(操作115)。保護性固態副產物選擇性地形成在暴露的氮化矽上,但不形成在矽上(操作118)。保護性固態副產物的形成消耗氮化矽的頂層,且保護性固態副產物具有來自電漿流出物之材料與來自氮化矽之材料。不論事實上在製程期間消耗非常少的氮化矽(且直到操作135為止更少量離開表面),操作113-118可共同指本文的第一乾式蝕刻階段。 從三氟化氮及氫氣(H2)所產生的電漿流出物包括各種分子、分子片段及離子物種。目前持有的保護性固態副產物形成的理論機制可能或並非完全正確,但電漿流出物被考慮為包括NH4F及NH4F.HF,此等易於與本文所述的暴露於低溫之含矽與氮的區域反應。舉例而言,電漿流出物可與氮化矽表面反應,以形成(NH4)2SiF6之保護層,以及數種揮發性副產物。揮發性副產物可藉由真空泵從基板處理區域移除。一層薄的(NH4)2SiF6固態副產物被遺留在圖案化基板表面的氮化矽部分上。一般而言,矽(Si)成分源自暴露的氮化矽,且來自(NH4)2SiF6的剩餘物之氮、氫及氟源自電漿流出物。可使用進入遠端電漿區域的各種氫對三氟化氮之比率,然而,介於1:1及6:1之間或約3:1的氫對三氟化氮可使用於本發明之實施例。 發明者已發現(保護性)固態副產物是針對以下乾式蝕刻階段的有效屏障。在此第二乾式蝕刻階段期間,三氟化氮之流體被引導進入遠端電漿區域(操作120)。於本發明的實施例中,少量或並無氫共同引導進入遠端電漿區域。可添加少量的氫(例如,少於1:5或1:10的H:F原子流量比率),而不破壞暴露的矽區域之高度選擇性蝕刻速率。 接著使在遠端電漿區域中形成的電漿流出物流入基板處理區域(操作125)。選擇地蝕刻經圖案化基板(操作130),部分歸因於保護性固態副產物的覆蓋,使得暴露的矽以顯著大於氮化矽的蝕刻速率之速率而被移除。操作120-130共同指本文的第二乾式蝕刻階段。在揭露的實施例中,蝕刻選擇性可大於或約3:1、大於或約5:1、大於或約10:1、大於或約20:1、大於或約30:1、大於或約50:1或大於或約80:1。此等蝕刻選擇性範圍不僅應用至(矽):(氮化矽),但更一般性地應用至(矽):(含矽與氮材料)。反應性化學物種藉由加熱圖案化基板自基板處理區域移除(操作135)。接著自處理區域移除基板(操作145)。 在第二乾式蝕刻階段,可使用較廣泛的氟的來源。含氟前驅物可包含至少一個選自以下構成之群組的前驅物:原子氟、雙原子氟、三氟化溴、三氟化氯、三氟化氮、氟化氫、六氟化硫及二氟化氙、四氟化碳、三氟甲烷、二氟甲烷、氟甲烷及類似者。在第二乾式蝕刻階段期間,使用含碳前驅物大體可從含氧前驅物的共同流獲得益處,以在碳可併入基板之前使含氧前驅物與碳反應。一般而言,氫原子將可取代氫氣而對此處所討論的所有材料作用,但氫分子在此等情況下將為總是存在的。 已發現氫分子以類似於含矽與氮材料之方式,而亦在含矽與氧材料上成長保護性固態副產物。亦已發現本文所呈現的遠端電漿蝕刻製程,相對於氧化矽(以及其他含矽與氧層),幫助矽的選擇蝕刻。先前的乾式蝕刻已達成高達約10:1之(矽):(氧化矽)的選擇性。使用本文所呈現的方法,對於(暴露的矽):(暴露的含矽與氧區域)的乾式蝕刻選擇性,在本發明的實施例中可大於或約20:1、50:1或100:1。蝕刻率選擇性係藉由在暴露的含矽與氧區域上形成保護性固態副產物而增進,以形成受保護的含矽與氧區域。受保護的含矽與氧區域維持受到保護,直到第二乾式蝕刻階段之後。本文所回報關於暴露的矽相對於暴露的含矽與氧材料或暴露的含矽與氮材料任一者,基本上受限於待移除的較高蝕刻速率材料的量。在實施例中,暴露的矽區域基本上缺乏氧及氮。 在本發明的實施例中,於第一乾式蝕刻階段期間圖案化基板的溫度可低於75℃、60℃、50℃、40℃或35℃之一者。於第一乾式蝕刻階段期間所形成的保護性固態副產物,於第二乾式蝕刻階段期間殘留在圖案化基板上,且於接續的昇華步驟期間被移除。一般而言,於第二乾式蝕刻階段期間基板的溫度可介於約-30℃及約80℃間,以確保保護性固態副產物並非過早地被移除。有益地,已發現在此範圍之中較低的溫度具有較高的蝕刻速率。在實施例中,於第一或第二乾式蝕刻階段期間基板的溫度可為約-20℃或更高、約-10℃或更高、0℃或更高、約5℃或更高或約10℃或更高。在所揭露的實施例中,於第二乾式蝕刻階段期間基板溫度亦可少於或約75℃、少於或約50℃、少於或約30℃、少於或約20℃、少於或約15℃或少於或約10℃。上限及下限可結合,以形成根據額外的實施例之範圍。在本發明的實施例中,完全昇華期間的固態副產物及圖案化基板的溫度可提昇高於90℃、100℃、120℃或140℃之一者。 第一乾式蝕刻階段可維持約3秒、5秒或10秒或更久。在本發明的實施例中,第一乾式蝕刻階段可維持約30秒、20秒或10秒或更少。在實施例中,第二乾式蝕刻階段可維持約15秒或約30秒或更久。在本發明的實施例中,第二乾式蝕刻階段可維持約2分鐘或約1分鐘或更少。任何上限可與任何下限結合,以提供額外的揭露實施例所呈現的額外的範圍。在所揭露的實施例中,昇華的期限可高於45秒、60秒、75秒、90秒或120秒之一者。 在第一乾式蝕刻階段期間,三氟化氮及/或氫可與一或多種相對的惰性氣體結合,如He、N2、Ar等等。可用惰性氣體來增進電漿穩定性。在一實施例中,三氟化氮NF3係以介於約5 sccm(每分鐘標準立方公分)及500 sccm之間的流速提供;H2係以介於約10 sccm與5 slm(每分鐘標準公升)之間的流速提供;He係以介於約0 sccm與3 slm之間的流速提供;且Ar係以介於約0 sccm與5 slm之間的流速提供。 在第二乾式蝕刻階段期間僅需要含氟前驅物。含氟前驅物可進一步包括一或更多相對惰性的氣體,例如He、N2、Ar或類似者。惰性氣體可用於改善電漿穩定性。在一實施例中,含氟氣體包括:流速介於約5 sccm(每分鐘標準立方公分)及500 sccm之間的NF3;流速介於約0 sccm與5 slm(每分鐘標準公升)之間的He;以及流速介於約0 sccm與3 slm之間的Ar。在本發明的實施例中,於第二乾式蝕刻階段期間少量或基本上沒有氫氣(H2)之流動。第二含氟前驅物及第二電漿流出物亦可以任何形式而基本上缺乏氫。為了確保,可在第二乾式蝕刻階段期間利用某些含氫前驅物。含氫前驅物可結合其它前驅物後流入電漿區域或個別流入電漿區域,然而,應保持低濃度。於上述範例中,氫可與電漿中的含氟前驅物反應,以形成可移除額外氮化矽(及/或氧化矽)的前驅物,所述前驅物藉由在介電質表面上形成固態副產物來移除氮化矽。通常,相較於暴露的含矽與氮區域及/或暴露的含矽與氧區域,此反應降低了暴露的矽之淨選擇性。儘管在某些實施例中導入一些氫可能是有利的,但在其它實施例中,於蝕刻製程期間也可能沒有或基本上沒有氫流被導入電漿區域。本案所屬技術領域中之一般技藝人士可體認到可依據數個因素來使用其它氣體及/或流,該等因素包括處理腔室配置、基板尺寸、待蝕刻特徵結構的表面形貌及布局等等。 在第一乾式蝕刻階段期間,本發明之方法包括下列步驟:當含氟前驅物及氫氣處在遠端電漿區域中的同時,施加能量至含氟前驅物及含氫前驅物,以產生電漿流出物。在第二乾式蝕刻階段期間,本發明之方法包括下列步驟:當含氟前驅物處在遠端電漿區域中的同時,施加能量至含氟前驅物,以產生電漿流出物。如本案所屬技術領域中的一般技藝者可認知的,在任一者階段期間的電漿可包括若干帶電荷物種及中性物種,包括自由基及離子。可使用已知技術(如,RF技術、電容耦合技術、感應耦合技術等等)來產生電漿。在一實施例中,可使用電容耦合式電漿單元在介於約10 W與15000 W之間的源功率及介於約0.2 Torr與30 Torr之間的壓力下施加能量。電容耦合式電漿單元可經設置而遠離處理腔室的氣體反應區域。舉例而言,可藉由噴頭及/或離子抑制器將電容耦合式電漿單元及電漿產生區域與氣體反應區域隔離。在某些實施例中,於第二乾式蝕刻階段期間,在基板處理區域之中基本上無離子化物種及自由電子的濃度。 在第一乾式蝕刻階段及/或第二乾式蝕刻階段期間,於基板處理區域之中的壓力低於或約50 Torr、低於或約30 Torr、低於或約20 Torr、低於或約10 Torr或低於或約5 Torr。在本發明的實施例中,在此等階段期間之壓力可高於或約0.1 Torr、高於或約0.2 Torr、高於或約0.5 Torr或高於或約1 Torr。溫度或壓力的任何上限可與任何下限結合,以形成額外的實施例。在第一乾式蝕刻階段期間的壓力可高於第二乾式蝕刻階段期間,因為對前驅物組合的依賴,以形成建立保護性固態副產物的前驅物。 一般而言,本文所述的製程可使用於抑制含矽及氮(且非僅僅氮化矽)之薄膜的乾式蝕刻速率。在本發明的實施例中,遠端電漿蝕刻製程可保護含矽與氮材料,該含矽與氮材料包括約30%或更多矽的原子濃度,及約30%或更多氮的原子濃度。含矽與氮材料亦可基本上由矽及氮組成,允許少量的摻雜濃度及其他非所欲或所欲的少數添加物。當然,在本發明的實施例中,含矽與氮材料可為氮化矽。 如上所述,相較於蝕刻含矽與氧材料,遠端電漿蝕刻製程亦可更快速地蝕刻矽。第一乾式蝕刻階段亦將在氧化矽及其他含矽與氧材料上建立保護層。在本發明的實施例中,含矽與氧材料可包括約30%或更多矽的原子濃度,及約30%或更多氧的原子濃度。含矽與氧材料亦可基本上由矽及氧組成,允許少量的其他非所欲或所欲的少數添加物之濃度。當然,在本發明的實施例中,含矽與氧材料可為氧化矽。 額外的製程參數在描述範理處理腔室與系統期間揭示。 範例處理系統 可實施本發明之實施例的處理腔室可被納入諸如可購自美國加州聖大克勞拉市的Applied Materials,Inc.的CENTURA®及PRODUCER®系統處理平台內。可與本發明之範例方法一併使用的基板處理腔室的範例可包括顯示並描述於共同讓渡給Lubomirsky等人的美國臨時專利申請案第60/803,499號中的該等腔室,該案於2006年5月30日提出申請,且標題為「PROCESS CHAMBER FOR DIELECTRIC GAPFILL」,該案全文在此併入作為參考。額外的範例系統可包括顯示並描述於美國專利第6,387,207號與第6,830,624號中的系統,該等專利之全文亦在此併入作為參考。 第2A圖為根據本文揭露的實施例之基板處理腔室200。遠端電漿系統210可處理含氟前驅物,含氟前驅物接著行進穿過氣體入口組件211。在氣體入口組件211內可見兩個個別的氣體供應通道。第一通道212裝載穿過遠端電漿系統210(RPS)的氣體,而第二通道213繞過遠端電漿系統210。在實施例中,任一通道皆可供含氟前驅物所用。另一方面,第一通道212可供製程氣體所用,且第二通道213可供處理氣體(treatment gas)所用。圖所示之蓋體(或導電的頂部分)221及穿孔的隔件或噴頭253之間有絕緣環224,絕緣環使得AC電位得以相對於噴頭253施加到蓋體221。AC電位在腔室電漿區域220中點燃電漿。製程氣體可行進穿過第一通道212進入腔室電漿區域220,且可單獨受到腔室電漿區域220中(或者與遠端電漿系統210結合)之電漿的激發。若製程氣體(含氟前驅物)流經第二通道213,則隨後僅有腔室電漿區域220用於激發。腔室電漿區域220及/或遠端電漿系統210的結合可指本文中的遠端電漿系統。穿孔的隔件(亦指噴頭)253將噴頭253下方的腔室電漿區域220與基板處理區域270分隔。噴頭253使電漿得以存在於腔室電漿區域220中,以避免直接於基板處理區域270中激發氣體,同時依然使受激發物種得以從腔室電漿區域220行進至基板處理區域270。 噴頭253位於腔室電漿區域220與基板處理區域270之間,且噴頭253容許在遠端電漿系統210及/或腔室電漿區域220內產生的電漿流出物(前驅物或其它氣體的受激發衍生物)通過複數個通孔256,通孔256橫切板的厚度。噴頭253也具有一或多個中空容積251,蒸氣或氣體形式的前驅物可填充中空容積251,並通過小通孔255進入基板處理區域270但不直接進入腔室電漿區域220。此揭露之實施例中的噴頭253比通孔256的最小直徑250的長度還厚。為了維持從腔室電漿區域220穿透至基板處理區域270的受激發物種之顯著濃度,可透過形成通孔256之較大的直徑部分使該較大的直徑部分穿過噴頭253達某一程度(part way),而限制通孔的最小直徑250的長度226。在本文揭露的實施例中,通孔256的最小直徑250之長度可與通孔256的最小直徑相同數量級,或者為較小的數量級。 離子抑制器可用於控制通過進入基板處理區域的離子密度。此可供以在受保護的含矽與氮材料及矽之間進一步增加蝕刻速率差異。離子抑制元件的功能為減少或消滅自電漿產生區域行進至基板的帶離子電荷物種。不帶電的中性或自由基物種可通過離子抑制器中的開口而於基板處發生反應。應注意的是,完全消滅圍繞基板的反應區域中之帶離子電荷物種並不總是期望的目標。在許多實例中,需要離子物種抵達基板,以進行蝕刻及/或沉積製程。在這些實例中,離子抑制器有助於將反應區域中之離子物種的濃度控制在能協助製程的水平。 根據本發明的某些實施例,在本文所述之離子抑制器可用來提供自由基及/或中性物種,用於選擇地蝕刻基板。在一個實施例中,例如,離子抑制器可用來提供含氟之電漿流出物,以更加選擇性地蝕刻矽或氮化矽。除了保護性固態副產物之外,使用經離子過濾的電漿流出物,例如矽相對於氮化矽及/或氧化矽的蝕刻速率選擇性可進一步增加至本文所述的值。離子抑制器可用於提供反應性氣體,所述反應性氣體所具有的自由基濃度高於離子濃度。因為電漿的大部分帶電顆粒被離子抑制器過濾或移除,在蝕刻製程期間基板不一定需要偏壓。相較於包括濺鍍及轟擊的習用電漿蝕刻製程而言,此等使用自由基及其它中性物種的製程可減少電漿傷害。 如第2A圖所示,噴頭253可經配置以符合離子抑制器的目的。或者,可包括隔離處理腔室元件(未繪示)來抑制離子濃度行進至基板處理區域270。蓋體221與噴頭253可分別具有第一電極與第二電極的功能,使得蓋體221與噴頭253可接收不同的電壓。在這些配置中,可將電功率(如,RF功率)施加至蓋體221、噴頭253或二者。舉例而言,可將電功率施加至蓋體221,同時使噴頭253(作為離子抑制器)接地。基板處理系統可包括RF產生器,RF產生器將電功率供應至蓋體及/或噴頭253。施加至蓋體221的電壓可促進腔室電漿區域220內之電漿的均勻分布(即,減少局部化的電漿)。為了能在腔室電漿區域220中形成電漿,絕緣環224可使蓋體221與噴頭253電性絕緣。絕緣環224可由陶瓷製作,且可具有高崩潰電壓以避免產生火花。接近剛才所述之電容耦合式電漿部件的基板處理腔室200部分可進一步包括冷卻單元(未繪示),冷卻單元包括一或多個冷卻流體通道,以用循環冷卻劑(如,水)冷卻暴露於電漿的表面。 在所顯示的實施例中,一旦製程氣體受到腔室電漿區域220中的電漿激發而形成電漿流出物,噴頭253可(透過通孔256)分配電漿流出物。在某些實施例中,導入遠端電漿系統210及/或腔室電漿區域220的製程氣體可含有氟(如,F2、NF3或XeF2)。製程氣體也可包括諸如氦、氬、氮(N2)等的載氣。電漿流出物可包括製程氣體的離子化或中性的衍生物,且在此亦可指是自由基氟,該前驅物即為所導入的製程氣體之原子的組分。 通孔256經配置以阻止帶離子電荷物種遷移離開腔室電漿區域220,同時容許不帶電的中性或自由基物種通過噴頭253進入基板處理區域270。這些不帶電的物種可包括高度反應性物種,高度反應性物種可與較不具反應性之載氣一起藉由通孔256輸送。如上文所提及,可減少離子物種藉由通孔256進行遷移,且在某些實例中,可完全阻止離子物種藉由通孔256進行遷移。控制離子物種通過噴頭253的數量可增進對與下方晶圓基板接觸之氣體混合物的控制,從而增進對氣體混合物之沉積及/或蝕刻特性的控制。舉例而言,調整氣體混合物的離子濃度可顯著改變該氣體混合物選擇性(如,矽:氮化矽之蝕刻比例,以及矽:氧化矽之蝕刻比例)。 在某些實施例中,通孔256的數目可介於約60個與約2000個之間。通孔256可具有各種形狀,但最容易被製成圓形。在本文揭露的實施例中,通孔256的最小直徑250可介於約0.5 mm與約20 mm之間,或介於約1 mm與約6 mm之間。在選擇通孔的截面形狀上,亦有範圍,截面可做成錐形、圓柱形或該二種形狀的組合。在本文所揭露的實施例中,用於將未激發的前驅物導入基板處理區域270的小通孔255數目可介於約100與約5000之間,或介於約500與約2000之間。小通孔255的直徑可介於約0.1 mm與約2 mm之間。 通孔256可經配置以控制電漿活化之氣體(即,離子、自由基及/或中性物種)通過噴頭253。舉例而言,通孔的縱橫比(即,孔徑對長度)及/或通孔的表面形貌可受到控制,藉以減少通過噴頭253的經活化氣體中的帶離子電荷物種流。噴頭253中的通孔256可包括面對腔室電漿區域220的錐形部分,以及面對基板處理區域270的圓柱形部分。可訂定圓柱形部分的比例及尺寸以控制通過進入基板處理區域270的離子物種流。可調整的電偏壓也可被施加至噴頭253作為控制穿過噴頭253的離子物種流之額外手段。 或者,通孔256朝向噴頭253的頂表面可具有較小的內徑(inner diameter;ID),且朝向噴頭253的底表面可具有較大的ID。此外,可將通孔256的底緣切角,以在電漿流出物離開噴頭時,促進將電漿流出物均勻地分布於基板處理區域270中,並因而增進電漿流出物及前驅物氣體的均勻分布。較小的ID可沿著通孔256設置於多個位置,並仍可容許噴頭253可降低基板處理區域270內的離子密度。離子密度的降低起因於離子在進入基板處理區域270之前與孔壁碰撞次數的增加。每次碰撞增加了藉由從孔壁獲得或失去電子而使離子中和的可能性。一般而言,通孔256的較小的ID可介於約0.2 mm與約20 mm之間。在其它實施例中,較小的ID可介於約1 mm與約6 mm之間,或介於約0.2 mm與約5 mm之間。進一步,通孔256的縱橫比(即,較小的ID對通孔長度)可為將近1至20。通孔的較小的ID可為沿著通孔的長度可見之最小ID。通孔256的剖面形狀一般可為圓柱形、圓錐形或該等形狀的任何組合。 第2B圖為根據本文揭露的實施例與處理腔室一起使用之噴頭253的底視圖。噴頭253對應第2A圖所示之噴頭。通孔256被描繪成在噴頭253底部具有較大內徑(ID),且在頂部具有較小ID。小通孔255實質上平均分布在噴頭的表面上,甚至分佈在通孔256之間,相較於本文所述的其它實施例,這種分佈方式有助於提供更均勻的混合。 當含氟電漿流出物穿過噴頭253中的通孔256抵達基板處理區域270時,範例經圖案化基板可在基板處理區域270內由基座(未繪示)支撐。儘管可將基板處理區域270裝配成支援電漿以供諸如固化等其它製程所用,然而在本發明的實施例中,蝕刻經圖案化基板期間無電漿存在。 可在噴頭253上方的腔室電漿區域220中,或在噴頭253下方的基板處理區域270中點燃電漿。電漿存在腔室電漿區域220中,以自流入的含氟前驅物製造自由基氟。典型處在無線射頻(RF)範圍中的AC電壓可被施加在處理腔室的導電頂部分(蓋體221)與噴頭253之間,以於沉積期間在腔室電漿區域220中點燃電漿。RF功率供應器可產生13.56 MHz的高RF頻率,但也可單獨或結合13.56 MHz頻率產生其它頻率。 當基板處理區域270中的底部電漿啟動時,可使頂部電漿處在低功率或無功率下,以硬化膜或清潔形成基板處理區域270邊界的內表面。可藉由在噴頭253與基座之間或在噴頭253與腔室的底部之間施加AC電壓,來點燃基板處理區域270中的電漿。可在電漿存在的同時,引導清潔氣體進入基板處理區域270。 基座可具有熱交換通道,熱交換流體流過熱交換通道以控制基板的溫度。此配置方式容許冷卻或加熱基板溫度,以維持相對低的溫度(從室溫直到約120℃)。熱交換流體可包含乙二醇與水。可使用埋入式單迴圈埋入式加熱器元件,來電阻式加熱基座的晶圓支撐淺盤(較佳為鋁、陶瓷或前述材料之組合)達到相對高的溫度(從約120℃直到約1100℃),該加熱器元件經配置以造成平行的同心圓形式的兩個完整迴轉。加熱器元件的外部分可繞於鄰接支撐淺盤的周邊處,同時加熱器元件的內部分繞於具有較小半徑的同心圓的路徑上。連接至加熱器元件的配線穿過基座的主幹。 腔室電漿區域或遠端電漿系統中的區域可稱為遠端電漿區域。在某些實施例中,自由基前驅物(即,自由基氟)形成於遠端電漿區域中,並行進進入矽或含矽與氮材料優先被蝕刻的基板處理區域中。在某些實施例中,電漿功率可基本上僅被施加至遠端電漿區域,以確保電漿流出物不會在基板處理區域中進一步被激發。 在利用腔室電漿區域的實施例中,被激發的電漿流出物是在與沉積區域分隔的基板處理區域的區段中產生。該沉積區域(在本文中亦稱作基板處理區域)是電漿流出物混合並反應以蝕刻經圖案化基板(如,半導體晶圓)之處。被激發的電漿流出物也可伴隨著惰性氣體(在範例實例中,惰性氣體為氬氣)。在蝕刻經圖案化基板期間,本文中的基板處理區域可被描述為「無電漿(plasma-free)」。「無電漿」不必然意味著該區域缺乏電漿。因通孔256的形狀及尺寸之故,在電漿區域內所產生之相對低濃度的離子化物種及自由電子會行進穿過隔件(噴頭/離子抑制器)中的孔洞(口孔)。在某些實施例中,基板處理區域內基本上沒有離子化物種及自由電子的濃度。腔室電漿區域中電漿的邊界是難以界定的,且可能透過噴頭中的口孔侵入基板處理區域上。在感應耦合電漿的實例中,可直接在基板處理區域內執行少量的離子化。再者,低強度的電漿可在基板處理區域中生成,而不至於消滅形成的膜之期望特徵。激發的電漿流出物生成期間造成電漿的強度離子密度遠低於腔室電漿區域(就此而言,或者是遠低於遠端電漿區域)的所有原因不悖離本文所用的「無電漿」之範疇。 三氟化氮(及若存在的氫氣)進入腔室的結合流速可佔總氣體混合物的體積的0.05%至約20%;剩餘的部分是載氣。在一些實施例中,三氟化氮及氫氣流入遠端電漿區域,但電漿流出物具有相同的體積流量比率。在三氟化氮的實例中,可在含氟氣體之前先啟動淨化氣體或載氣進入遠端電漿區域,以穩定遠端電漿區域內的壓力。 施加至遠端電漿區域的電漿功率可為多種頻率或為多重頻率的組合。在範例處理系統中,可藉由蓋體221與噴頭253之間所傳遞的RF功率來提供電漿。在本文所揭露的實施例中,RF功率可介於約10瓦與約15000瓦之間、介於約20瓦與約1500瓦之間,或介於約50瓦與約500瓦之間。在本文所揭露的實施例中,於範例處理系統中所施加的RF頻率可為小於約200 kHz的低RF頻率、介於約10 MHz與約15 MHz之間的高RF頻率,或大於或等於約1 GHz的微波頻率。此等電漿參數可應用至本文所述的第一乾式蝕刻階段及第二乾式蝕刻階段兩者。 在將載氣與電漿流出物流入基板處理區域270期間,可將基板處理區域270維持在各種壓力下。基板處理區域內的壓力低於或等於約50 Torr、低於或等於約30 Torr、低於或等於約20 Torr、低於或等於約10 Torr或低於或等於約5 Torr。在本發明的實施例中,壓力可高於或等於約0.1 Torr、高於或等於約0.2 Torr、高於或等於約0.5 Torr或高於或等於約1 Torr。壓力的下限可與壓力的上限結合以達成本發明的進一步實施例。 在一或多個實施例中,基板處理腔室200可整合至各種多處理平台,包括可購自美國加州聖大克勞拉市的Applied Materials,Inc.的ProducerTM GT、CenturaTM AP及EnduraTM平台。此類處理平台能夠進行數種處理操作而不破真空。可實施本發明實施例的處理腔室可包括介電蝕刻腔室或各種化學氣相沉積腔室,還有其它類型的腔室。 沉積系統的實施例可併入較大型的生產積體電路晶片的製造系統。第3圖顯示根據本文揭露的實施例的一個此類沉積、烘烤及硬化腔室的系統300。於此圖中,一對前開式晶圓盒(front opening unified pod,FOUP)302供應基板,基板(例如,300 mm直徑之晶圓)由機器人手臂304承接,並在置入晶圓處理腔室308a至308f中之一者以前先置入低壓保持區306內。可使用第二機器人手臂310自低壓保持區306傳輸基板晶圓至晶圓處理腔室308a至308f並往回傳輸。晶圓處理腔室308a至308f之各者可被裝備成進行多個基板處理操作,該等操作包括本文所述的乾式蝕刻製程,還可包括循環層沉積(CLD)、原子層沉積(ALD)、化學氣相沉積(CVD)、物理氣相沉積(PVD)、蝕刻、預清潔、脫氣、定向及其它基板製程等額外操作。 晶圓處理腔室308a至308f可包括一或多個系統部件,以在基板晶圓上沉積、退火處理、硬化及/或蝕刻可流動介電膜。在一個配置中,兩對處理腔室(如,308c至308d及308e至308f)可用於沉積介電材料於基板上,而第三對處理腔室(如,308a至308b)可用於蝕刻沉積的介電質。在另一個配置中,所有三對腔室(如,308a至308f)可經配置以在基板上蝕刻介電膜。任一或多個所述的製程可在與本文揭露的實施例中所示的製造系統分開的腔室上執行。 基板處理系統由系統控制器所控制。在示範實施例中,系統控制器包括硬碟機、軟碟機及處理器。處理器含有單板電腦(SBC)、類比及數位輸入/輸出板、介面板及步進馬達控制板。CVD系統的各種部件符合Versa Modular European(VME)標準,該標準定義板、卡片機架(card cage)以及連接器尺寸及類型。VME標準亦定義具有16位元資料匯流排及24位元位址匯流排之匯流排結構。 系統控制器357可用於控制馬達、閥、流量控制器、電源供應器以及其它執行本文所述製程配方需要的功能。氣體操縱系統355也可由系統控制器357控制,以將氣體引導至晶圓處理腔室308a至308f的其中一個或全部。系統控制器357可仰賴來自光學感測器的反饋,以確定並且調整氣體操縱系統355及/或晶圓處理腔室308a至308f中之可移動的機械組件之位置。機械組件可包括機器人、節流閥及基座,前述部件在系統控制器357的控制下藉由馬達移動。 在示範實施例中,系統控制器357包括硬碟機(記憶體)、USB埠、軟碟機及處理器。系統控制器357包括類比及數位輸入/輸出板、介面板及步進馬達控制板。含有基板處理腔室200的多重腔室處理系統300之各種部件受到系統控制器357之控制。系統控制器執行系統控制軟體,系統控制軟體以電腦程式之形式儲存在諸如硬碟、軟碟或快閃記憶體隨身碟等電腦可讀媒體上。也可使用其它形式的記憶體。電腦程式包括指令集,該等指令集指示時間、氣體混合、腔室壓力、腔室溫度、RF功率位準、基座位置及其它特定製程的參數。 可使用由控制器執行的電腦程式產品來實施用於在基板上沉積或其它方式處理膜的製程,或者實施用於清潔腔室的製程。電腦程式編碼可以習知電腦可讀的程式語言撰寫,例如68000組合語言、C、C++、Pascal、Fortran或其它程式語言。使用習知的文字編輯器將適合的程式編碼輸入單一檔案或多重檔案,並且儲存於電腦可使用媒體(如電腦的記憶體系統)或由電腦可使用媒體實施。倘若輸入的編碼文字是高階語言,則編譯編碼,而所得的編譯程式編碼隨後與預先編譯的Microsoft Windows®函式庫常式之目的碼連結。為了執行該連結、編譯的目的碼,系統使用者援用該目的碼,使電腦系統載入記憶體中的編碼。CPU隨後讀取並且執行該編碼,以進行程式中辨識的任務。 使用者與控制器之間的介面可為透過接觸感應顯示器,亦可包括滑鼠及鍵盤。在使用兩個顯示器的一個實施例中,一個顯示器安裝在清潔室壁以供操作者使用,且另一個顯示器在壁後以供維修技術人員使用。兩個顯示器可同時顯示相同資訊,在這樣的實例中,一次僅有一個顯示器被配置成接受輸入。為了選擇特定的螢幕或功能,操作者以手指或滑鼠接觸顯示螢幕上的指定的區域。被接觸的區域改變該區域的強調色彩,或顯示新的選單或螢幕,確認操作者的選擇。 本文所使用的「基板(substrate)」可為具有或不具有形成在上面的多個層之支撐基板。經圖案化基板可為有各種摻雜濃度及摻雜輪廓的絕緣體或半導體,可例如為用在積體電路製造上之類型的半導體基板。經圖案化基板的暴露的「矽(silicon)」主要是Si,但也可包括少量濃度的其它基本組成分,如硼、磷、氮、氧、氫、碳等等。術語「矽」可代表單晶矽或多晶矽。經圖案化基板的暴露的「氮化矽(silicon nitride)」主要是Si3N4,但也可包括少量濃度的其它基本組成分,如氧、氫、碳等等。經圖案化基板的暴露的「氧化矽(silicon oxide)」主要是SiO2,但也可包括其它基本組成分的濃度,如氮、氫、碳等等。在某些實施例中,使用本文所揭露之方法蝕刻的氧化矽膜基本上由矽與氧構成。術語「前驅物(precursor)」指的是參與反應從表面移除材料或沉積材料在表面上的任何製程氣體。「電漿流出物(plasma effluent)」描述自腔室電漿區域離開並且進入基板處理區域的氣體。電漿流出物處於「激發態(excited state)」,其中至少有一些氣體分子處於振動型式的激發、解離及/或離子化的狀態。「自由基前驅物(radical precursor)」是用於描述參與反應從表面移除材料或沉積材料在表面上的電漿流出物(離開電漿、處於激發態的氣體)。「自由基氟(radical-fluorine)」(或「自由基氫(radical-hydrogen)」)為含有氟(或氫)的自由基前驅物,但該自由基前驅物可能不含有其它基本組成分。「惰性氣體(inert gas)」一詞是指在蝕刻時不形成化學鍵結或被併入膜中的任何氣體。範例惰性氣體包括稀有氣體,但可包括其他氣體,只要當(一般而言)在膜中補捉到痕量的該氣體時不形成化學鍵結即可。 全文中所用之術語「間隙(gap)」與「溝槽(trench)」毫無暗指意味地是指蝕刻過的幾何形狀具有大的水平縱橫比。從表面上方觀之,溝槽可呈現圓形、卵形、多邊形、矩形或各種其它形狀。溝槽可以呈現材料島狀物周圍的壕溝形狀。術語「介層孔(via)」是指低縱橫比溝槽(由上方觀之),介層孔可或可不被金屬填充而形成垂直的電連接。如本文所用,共形蝕刻製程指的是以與表面相同的形狀大體上均勻地移除表面上的材料,即蝕刻過的層的表面與蝕刻前的表面大體上平行。發明所屬技術領域中具有通常知識者將瞭解蝕刻過的介面可能不會100%共形,因此「大體上(generally)」之用語容許可接受的容忍度。 已在此揭示數個實施例,發明所屬技術領域中具有通常知識者應知可使用多種修飾例、替代架構與等效例而不背離本文揭露的實施例的精神。此外,說明書中不對多種習知製程與元件做說明,以避免不必要地混淆了本發明。因此,上述說明不應被視為對本發明範疇之限制。 當提供一範圍的數值時,除非文本中另外清楚指明,應知亦具體揭示介於該範圍的上下限值之間各個區間值至下限值單位的十分之一。亦涵蓋了所陳述數值或陳述範圍中之區間值以及與陳述範圍中任何另一陳述數值或區間值之間的每個較小範圍。該等較小範圍的上限值與下限值可獨立包含或排除於該範圍中,且各範圍(其中,在該較小範圍內包含任一個極限值、包含兩個極限值,或不含極限值)皆被本發明內所陳述之範圍涵蓋,除非在該陳述的範圍中有特別排除之限制。在所陳述之範圍包括極限值的一者或兩者之處,該範圍也包括該些排除其中任一者或兩者被包括的極限值的範圍。 在本文與隨附申請專利範圍中所使用之單數形式「一(a、an)」與「該(the)」等用語也包括複數形式,除非文字中另外清楚指明。因此,舉例而言,「一種製程(a process)」所指的製程包括複數個此類製程,而「該介電材料(the dielectric material)」所指的包括一或多種介電材料以及該領域技術人士所熟知的該等材料之等效例等。 同樣,申請人希望此說明書與以下申請專利範圍中所用的「包含(comprise)」與「包括(include)」等用語是指存在所陳述之特徵、整體、部件或步驟,但該等用語不排除存在或增加一或多種其他特徵、整體、部件、步驟、動作或群組。 110~145‧‧‧處理步驟 200‧‧‧基板處理腔室 210‧‧‧遠端電漿系統 211‧‧‧氣體入口組件 212‧‧‧第一通道 213‧‧‧第二通道 220‧‧‧腔室電漿區域 221‧‧‧蓋體 224‧‧‧絕緣環 250‧‧‧通孔的最小直徑 251‧‧‧中空容積 253‧‧‧噴頭 255‧‧‧小孔 256‧‧‧通孔 270‧‧‧基板處理區域 300‧‧‧處理系統 302‧‧‧負載鎖定腔室 304‧‧‧機器人手臂 306‧‧‧保持區 308‧‧‧處理腔室 310‧‧‧第二機器人手臂 355‧‧‧氣體操縱系統 357‧‧‧系統控制器 透過參考說明書的其餘部份及圖式,可進一步瞭解本文揭露之實施例的本質與優點。 第1圖是乾式蝕刻處理的流程圖,根據所揭示的實施例而具有選擇性抑制的氮化矽蝕刻速率。 第2A圖圖示根據本發明實施例的基板處理腔室。 第2B圖圖示根據本發明實施例的基板處理腔室之噴頭。 第3圖圖示根據本發明實施例的基板處理系統。 在附圖中,相似的部件及/或特徵結構可具有相同的元件符號。進一步而言,同類的各部件可透過在元件符號後加上一破折號以及第二符號(該符號區別類似部件)加以區別。倘若在說明書中僅用第一元件符號,該敘述內容可應用至具有相同第一元件符號(無論第二元件符號為何)的類似部件之任一者。 110~145‧‧‧處理步驟
权利要求:
Claims (19) [1] 一種在一基板處理腔室的一基板處理區域中蝕刻一圖案化基板的方法,其中該圖案化基板具有一暴露的含矽與氮區域暴露的矽,蝕刻該圖案化基板的該方法包含以下步驟:(1)一第一乾式蝕刻階段,包含以下步驟:將三氟化氮及氫氣(H2)之各者流入一遠端電漿區域,該遠端電漿區域流體耦合至該基板處理區域,同時在該電漿區域中形成一第一電漿,以產生第一電漿流出物,及在該暴露的含矽與氮區域上形成保護性固態副產物,以藉由將該第一電漿流出物通過一噴頭中的通孔,而流入該基板處理區域,來形成一受保護的含矽與氮區域;(2)一第二乾式蝕刻階段,包含以下步驟:將一第二含氟前驅物流入該遠端電漿區域,同時在該電漿區域中形成一第二電漿,以產生第二電漿流出物,及藉由將該第二電漿流出物通過該噴頭中的該等通孔,流入該基板處理區域,而相較於該受保護的含矽與氮區域,更快速地蝕刻該矽;及(3)藉由提昇該圖案化基板的一溫度,自該受保護的含矽與氮區域昇華該保護性固態副產物。 [2] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該暴露的含矽與氮區域為氮化矽。 [3] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該暴露的含矽與氮區域基本上由矽及氮組成。 [4] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該暴露的含矽與氮區域包含約30%或更多的矽之原子濃度,及約30%或更多的氮之原子濃度。 [5] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中在該第一乾式蝕刻階段及該第二乾式蝕刻階段之各者期間,該圖案化基板的一溫度大於或約-20℃且小於或約75℃。 [6] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中在該第一乾式蝕刻階段及該第二乾式蝕刻階段之各者期間,於該基板處理區域之中的一壓力低於或約50 Torr且高於或約0.1 Torr。 [7] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中在該電漿區域中形成該第一電漿及在該電漿區域中形成該第二電漿之步驟包含以下步驟:在該第一乾式蝕刻階段及該第二乾式蝕刻階段之各者期間,施加介於約10瓦及15000瓦之間的RF功率至該電漿區域。 [8] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該第一電漿及該第二電漿兩者均為電容耦合式電漿。 [9] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該暴露的矽為單晶矽或多晶矽。 [10] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中蝕刻該圖案化基板之該方法的一選擇性(暴露的矽區域:暴露的含矽與氮區域)為大於或約3:1。 [11] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中蝕刻該圖案化基板之該方法的一選擇性(暴露的矽區域:暴露的含矽與氮區域)為大於或約5:1。 [12] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中在該第一乾式蝕刻階段及該第二乾式蝕刻階段之各者期間,該基板處理區域基本上不含電漿。 [13] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該圖案化基板亦具有一暴露的含矽與氧區域,形成保護性固態副產物之該操作進一步包含以下步驟:在該暴露的含矽與氧區域上形成保護性固態副產物,以形成一受保護的含矽與氧區域,且相較於該受保護的含矽與氮區域而更快速地蝕刻該矽之該操作進一步包含以下步驟:相較於該受保護的含矽與氧區域,更快速地蝕刻該矽。 [14] 如請求項第13項所述的蝕刻該圖案化基板之方法,其中蝕刻該圖案化基板之該方法的一選擇性(暴露的矽區域:暴露的含矽與氧區域)為大於或約20:1。 [15] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該第二含氟前驅物及該第二電漿流出物基本上缺乏氫。 [16] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中在該第二乾式蝕刻階段期間,於該基板處理區域內基本上沒有離子化物種及自由電子的濃度。 [17] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中在該第二乾式蝕刻階段期間,基本上沒有氫氣(H2)流入該基板處理區域中。 [18] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中自該受保護的含矽與氮區域昇華該保護性固態副產物之該操作包含以下步驟:提昇該圖案化基板的一溫度高於90℃。 [19] 如請求項第1項所述的蝕刻該圖案化基板之方法,其中該暴露的矽基本上缺乏氧及氮。
类似技术:
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同族专利:
公开号 | 公开日 KR101509010B1|2015-04-07| WO2013033527A2|2013-03-07| TWI459464B|2014-11-01| WO2013033527A3|2013-04-25| KR101508994B1|2015-04-07| US8679983B2|2014-03-25| KR20140136532A|2014-11-28| US20130130506A1|2013-05-23| US20130059440A1|2013-03-07| CN103765562A|2014-04-30| CN103765562B|2016-11-09| KR20140068127A|2014-06-05| US8541312B2|2013-09-24|
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法律状态:
2020-08-01| MM4A| Annulment or lapse of patent due to non-payment of fees|
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申请号 | 申请日 | 专利标题 US201161530302P| true| 2011-09-01|2011-09-01|| US13/449,441|US8679983B2|2011-09-01|2012-04-18|Selective suppression of dry-etch rate of materials containing both silicon and nitrogen| 相关专利
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